PCF2119RUSLASH2 datasheet(6/68 Pages) PHILIPS

6 / 68 page

2003 Jan 30

Philips Semiconductors

Product speciﬁcation

LCD controllers/drivers

PCF2119X

PAD INFORMATION

The identification of each pad and its location is given in Chapter 18.

6.1

Pad functions

Table 1

Pad function description

Note

1. When the I2C-bus is used, the parallel interface pad E must be at logic 0. In the I2C-bus read mode DB7 to DB4 and

DB2 to DB0 should be connected to VDD1 or left open-circuit.

a) When the parallel bus is used, pads SCL and SDA must be connected to VSS1 or VDD1; they must not be left

open-circuit.

b) If the 4-bit interface is used without reading out from the PCF2119x (i.e. R/W is set permanently to logic 0), the

unused ports DB0 to DB4 can either be set to VSS1 or VDD1 instead of leaving them open-circuit.

SYMBOL

DESCRIPTION

VDD1

Logic supply voltage.

VDD2, VDD3

High voltage generator supply voltages (always put VDD2 =VDD3).

VSS1

This is the ground pad for all except the high voltage generator.

VSS2

This is the ground pad for the high voltage generator.

VLCD1

This input is used for the generation of the LCD bias levels.

VLCD2

This is the VLCD output pad if VLCD is generated internally then pad VLCD2 must be connected to VLCD1.

The pad must be left open-circuit when VLCD is generated externally.

VLCDSENSE

This input (VLCD) is used for the voltage multiplier’s regulation circuitry. This pad must be connected to

VLCD2 when using internal LCD supply and to VLCD1 and VLCD2 when using external LCD supply.

The data bus clock input is set HIGH to signal the start of a read or write operation; data is clocked in

or out of the chip on the negative edge of the clock; note 1.

T1 to T3

These are three test pads. T1 and T2 must be connected to VSS1; T3 is left open-circuit and is not user

accessible.

R1 to R18;

R17DUP

LCD row driver outputs R1 to R18; these pads output the row select waveforms to the display;

R17 and R18 drive the icons. R17 has two pads R17 and R17DUP.

C1 to C80

LCD column driver outputs C1 to C80.

SCL

I2C-bus serial clock input; note 1.

POR

External power-on reset input.

PD selects the chip power-down mode; for normal operation PD = 0.

SDA

I2C-bus serial data input/output; note 1.

R/W

This is the read/write input. R/W selects either the read (R/W = 1) or write (R/W = 0) operation. This

pad has an internal pull-up resistor.

The RS input selects the register to be accessed for read and write. RS = 0, selects the instruction

both read and write. This pad has an internal pull-up resistor.

DB0 to DB7

The 8-bit bidirectional data bus (3-state) transfers data between the system controller and the

PCF2119x. DB7 may be used as the busy ﬂag, signalling that internal operations are not yet

completed. In 4-bit operations the 4 higher order lines DB7 to DB4 are used; DB3 to DB0 must be left

open-circuit. Data bus line DB3 has an alternative function (SA0), when selected this is the I2C-bus

address pad. Each data line has its own internal pull-up resistor; note 1.

OSC

Oscillator or external clock input. When the on-chip oscillator is used this pad must be connected to

VDD1.

PCF2119RU/2 Datasheet(PDF) 6 Page - NXP Semiconductors

PCF2119RU/2 Datasheet(HTML) 6 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL