| Electronic Components Datasheet Search |
|
STM32G0C1NET6X Datasheet(PDF) 106 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32G0C1NET6X Datasheet(HTML) 106 Page - STMicroelectronics |
|
106 / 159 page ![]() Electrical characteristics STM32G0C1xC/xE 106/159 DS13564 Rev 4 ENOB Effective number of bits VDDA = VREF+ = 3 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = 25 °C 10.1 10.2 - bit 2 V < VDDA = VREF+ < 3.6 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = entire range 9.6 10.2 - 1.65 V < VDDA = VREF+ < 3.6 V; TA = entire range Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps; Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps; 9.5 10.2 - SINAD Signal-to-noise and distortion ratio VDDA = VREF+ = 3 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = 25 °C 62.5 63 - dB 2 V < VDDA = VREF+ < 3.6 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = entire range 59.5 63 - 1.65 V < VDDA = VREF+ < 3.6 V; TA = entire range Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps; Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps; 59 63 - SNR Signal-to-noise ratio VDDA = VREF+ = 3 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = 25 °C 63 64 - dB 2 V < VDDA = VREF+ < 3.6 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = entire range 60 64 - 1.65 V < VDDA = VREF+ < 3.6 V; TA = entire range Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps; Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps; 60 64 - THD Total harmonic distortion VDDA = VREF+ = 3 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = 25 °C --74 -73 dB 2 V < VDDA = VREF+ < 3.6 V; fADC = 35 MHz; fs ≤ 2.5 MSps; TA = entire range --74 -70 1.65 V < VDDA = VREF+ < 3.6 V; TA = entire range Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps; Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps; --74 -70 1. Based on characterization results, not tested in production. 2. ADC DC accuracy values are measured after internal calibration. 3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion of signal on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins susceptible to receive negative current. 4. I/O analog switch voltage booster enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled when VDDA ≥ 2.4 V. Table 63. ADC accuracy(1)(2)(3) (continued) Symbol Parameter Conditions(4) Min Typ Max Unit |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |