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9FGP205 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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9FGP205 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 19 page ![]() 9FGP205 IDT® Frequency Timing Generator for Peripherals 1664—07/16/14 Frequency Timing Generator for Peripherals 1 DATASHEET Pin Configuration Recommended Application: Peripheral Clock for Intel Servers with Wake-On-Lan support Output Features: • 1 - 0.7V current-mode differential CPU output • 6 - 50MHz RMII outputs • 2 - 125MHz RGMII outputs • 1 - 0.7V current-mode differential DOT 96MHz output • 1 - 33.33MHz output • 1 - 32.768KHz output • 2 - 25MHz REF outputs Key Specifications: • Exact synthesis on CPU, RGMII, RMII & 33.33MHz clocks • +/- 100ppm frequency accuracy on other clocks Features/Benefits: • Selectable SMBus Address - D0/D1 or C0/C1 • Spread Spectrum capability on CPU and DOT 96MHz clocks • SMBus Control: - M/N and spread programming on CPU and DOT 96MHz clocks via SMBus - Differential outputs can be disabled via pins or SMBus CPU FS2 CPU FS1 CPU FS0 Byte0 Bit2 Byte0 Bit1 Byte0 Bit0 0 0 0 266.67 96.00 33.33 50.00 125.00 25.00 32.768 0 0 1 133.33 96.00 33.33 50.00 125.00 25.00 32.768 0 1 0 200.00 96.00 33.33 50.00 125.00 25.00 32.768 0 1 1 166.67 96.00 33.33 50.00 125.00 25.00 32.768 1 0 0 333.33 96.00 33.33 50.00 125.00 25.00 32.768 1 0 1 100.00 96.00 33.33 50.00 125.00 25.00 32.768 1 1 0 400.00 96.00 33.33 50.00 125.00 25.00 32.768 1 1 1 Reserved 96.00 33.33 50.00 125.00 25.00 32.768 Power up default is highlighted. RMII MHz Functionality CPUCLK MHz DOT96SS MHz 33.33 MHz RGMII MHz 25 MHz 32.768 KHz 40 39 38 37 36 35 34 33 32 31 GND 130 GNDRMII VDD96 229 RMII2 DOT96SST 328 RMII3 DOT96SSC 427 GNDRMII OE_96 526 VDDRMII OE_CPU 625 RMII4 CPUCLKT0 724 RMII5 CPUCLKC0 823 VDD33 VDDCPU 922 33.33MHZ/**SMBADR GNDCPU 10 21 GND33 11 12 13 14 15 16 17 18 19 20 9FGP205 40-MLF * Internal Pull-Up Resistor ** Internal Pull-Dow n Resistor SMBus Address Selection SMBADR = 0 SMBADR = 1 D0/D1 C0/C1 SMBADR |
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