LOW SKEW, 1-TO-2

LVCMOS / LVTTL FANOUT BUFFER

8302I

Data Sheet

©2016 Integrated Device Technology, Inc

Revision A March 4, 2016

1

GENERAL DESCRIPTION

The 8302I is a low skew, 1-to-2 LVCMOS Fanout Buffer. The

8302I has a single ended clock input. The single ended clock

input accepts LVCMOS or LVTTL input levels.The 8302I features

a pair of LVCMOS outputs. The 8302I is characterized at full

3.3V for input V

DD, and mixed 3.3V and 2.5V for output operating

supply modes (V

DDO). Guaranteedoutput and part-to-part skew

char acter istics mak e the 8302I ideal f or cloc k

distribution applications demanding well defined performance

and repeatibility.

FEATURES

• 2 LVCMOS / LVTTL outputs

• LVCMOS / LVTTL clock input accepts LVCMOS

or LVTTL input levels

• Maximum output frequency: 200MHz

• Output skew: 40ps (typical)

• Part-to-part skew: 250ps (typical)

• Small 8 lead SOIC package saves board space

• Full 3.3V or 3.3V core, 2.5V supply modes

• -40°C to 85°C ambient operating temperature

• Lead-Free package fully RoHS compliant

BLOCK DIAGRAM

PIN ASSIGNMENT

8302I

8-Lead SOIC

3.8mm x 4.8mm, x 1.47mm package body

M Package

Top View

VDDO

VDD

CLK

GND

1

2

3

4

Q0

Q1

CLK

Q0

GND

VDDO

Q1

8

7

6

5