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ST33TPHF2XSPI Datasheet(PDF) 10 Page - STMicroelectronics

Part # ST33TPHF2XSPI
Description  STSAFE-TPM ST33TPHF2XSPI: TPM 2.0 device with an SPI interface
PDF  35 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST33TPHF2XSPI Datasheet(HTML) 10 Page - STMicroelectronics

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3.3
Register descriptions
Detailed descriptions of each register can be found in TCG PC Client Specific Platform TPM Profile for [PTP 2.0
r1.05].
3.4
Additional information
•
The TPM implement a PIRQ but does not implement an SIRQ pin.
•
Any write operation to the TPM_ACCESS_x register with more than one field set to a ‘1’ is not accepted.
•
Interface capability:
–
TPM_STS_x.burstCount is dynamic.
–
Interrupt detection mode “Level low” is supported (other modes “Level high” and “Edge” are not
supported).
–
Interrupts localityChange and dataAvailable are supported (Interrupt stsValid and commandReady
are not supported).
•
Transaction size:
–
The TPM accepts transactions to offset 0x0024-0x0027 which are of lengths from 1 to 32 bytes
(legacy FIFO).
–
The TPM accepts transactions to offset 0x0081-0x0083 which are of lengths from 1 to 32 bytes
(extended FIFO).
•
Vendor and Device ID for the TPM
–
TPM_DID_VID_X = 0x0000104A; // DID = 0x0000 and VID = 0x104A (id of STMicroelectronics
defined by TCG)
•
Revision ID for the TPM
–
TPM_RID_X = 0xFFFFFF4E; // 0xFFFFFF = reserved
3.5
Recommendations
For optimized performance results, the use of an extended data FIFO with 32-byte burst is mandatory.
When the falling edge occurs on the SPI_CS signal, SPI_CLK must be at the low logic level as defined in
Figure 7. SPI slave timing diagram - SPI_CLK low (by default).
If the device does not show this behavior, add a 56 pF capacitor (example value) on the SPI_CS line to slow the
falling edge on SPI_NSS or SPI_CS.
3.6
Integration requirements
•
When the falling edge occurs on the SPI_CS signal, SPI_CLK must be at the low logic level as defined in
Figure 7. SPI slave timing diagram - SPI_CLK low (by default).
If the device does not show this behavior, add a 56 pF capacitor (example value) on the SPI_CS line to
slow the falling edge on SPI_NSS or SPI_CS.
•
The duration of TPM_HASH_DATA exceeds 250 µs if SHA384 and Dual bank management are
implemented.
•
In Windows 10 or 11, for using a 3072-bit RSA key, update the following, if it exists in the registry editor:
[HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Services\TPM]
“TimeoutCommandCreate”=dword:00493E0
ST33TPHF2XSPI
Register descriptions
DS14186 - Rev 1
page 10/35



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