P80C31 datasheet(2/38 Pages) PHILIPS

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Philips Semiconductors

Product specification

80C51/87C51/80C31

80C51 8-bit microcontroller family

4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),

low power, high speed (33 MHz)

2000 Jan 20

853–0169 23001

DESCRIPTION

The Philips 8XC51/31 is a high-performance static 80C51 design

fabricated with Philips high-density CMOS technology with operation

from 2.7V to 5.5V.

The 8XC51/31 contains a 4k

× 8 ROM, a 128 × 8 RAM, 32 I/O lines,

three 16-bit counter/timers, a six-source, four-priority level nested

interrupt structure, a serial I/O port for either multi-processor

communications, I/O expansion or full duplex UART, and on-chip

oscillator and clock circuits.

In addition, the device is a low power static design which offers a

wide range of operating frequencies down to zero. Two software

selectable modes of power reduction—idle mode and power-down

mode are available. The idle mode freezes the CPU while allowing

the RAM, timers, serial port, and interrupt system to continue

functioning. The power-down mode saves the RAM contents but

freezes the oscillator, causing all other chip functions to be

inoperative. Since the design is static, the clock can be stopped

without loss of user data and then the execution resumed from the

point the clock was stopped.

SELECTION TABLE

For applications requiring more ROM and RAM,

see the 8XC52/54/58/80C32, 8XC51FA/FB/FC/80C51FA,

and 8XC51RA+/RB+/RC+/80C51RA+ data sheet.

ROM/EPROM

Memory Size

(X by 8)

RAM Size

(X by 8)

Programmable

Timer Counter

(PCA)

Hardware

Watch Dog

Timer

80C31/8XC51

0K/4K

128

80C32/8XC52/54/58

0K/8K/16K/32K

256

80C51FA/8XC51FA/FB/FC

0K/8K/16K/32K

256

Yes

80C51RA+/8XC51RA+/RB+/RC+

0K/8K/16K/32K

512

Yes

8XC51RD+

64K

1024

Yes

FEATURES

• 8051 Central Processing Unit

– 4k

× 8 ROM (80C51)

– 128

× 8 RAM

– Three 16-bit counter/timers

– Boolean processor

– Full static operation

– Low voltage (2.7V to 5.5V@ 16MHz) operation

• Memory addressing capability

– 64k ROM and 64k RAM

• Power control modes:

– Clock can be stopped and resumed

– Idle mode

– Power-down mode

• CMOS and TTL compatible

• TWO speed ranges at V

CC = 5V

– 0 to 16MHz

– 0 to 33MHz

• Three package styles

• Extended temperature ranges

• Dual Data Pointers

• Security bits:

– ROM (2 bits)

– OTP/EPROM (3 bits)

• Encryption array—64 bytes

• 4 level priority interrupt

• 6 interrupt sources

• Four 8-bit I/O ports

• Full–duplex enhanced UART

– Framing error detection

– Automatic address recognition

• Programmable clock out

• Asynchronous port reset

• Low EMI (inhibit ALE)

• Wake-up from Power Down by an external interrupt (8XC51)

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