RYZ012

R12DS0002EU0101 Rev.1.01

Page 3 of 24

May.05.22

System Control

Reset

The module supports different reset types, each with a different scope:

•

Power-on-Reset - On power-on the whole chip is reset. Consequently, all registers are set to their default

values.

•

Software Reset – All serial interface software items to control the protocol stacks support aserial

command to reset the module.

Power Supply

The device must be powered with an operating voltage between 1.8 V and 3.6 V. Internal DC/DC and LDO

converters generate the internal supply voltages required for operation. The chip’s embedded DCDC

generates 1.8-V output voltage as power supply for the internal flash and generates 1.4-V output voltage as

input to the LDO.

The embedded LDO regulator takes the 1.4-V voltage output from the DCDC and generates 1.2-V regulated

voltage to supply power for 1.2-V digital core and analog modules.

Power-On-Reset (POR) and Brown-out Detect

The modules power supply status is controlled by the UVLO (Ultra-low Voltage Lockout), PL (Power Logic)

module, and the external NRST pin through the logic shown in Figure 1. UVLO takes the external power

supply as input and releases the lock only when the power supply voltage is higher than a predefined

threshold. Typical values for these thresholds are shown in Table 2. The NRST pin has an internal pull-up

resistor. An external capacitor can be connected on the NRST pin to control the POR delay.

Figure 1. Power control logic

Figure 2. Power-up sequence