ZOPT2202 Datasheet

© 2016 Integrated Device Technology, Inc

21

September 21, 2016

Figure 3.5 I²C Register Read

0

S

Slave Addr

7 Bit

1

A

Address

8 Bit

N P

Register Read (I²C Read)

Write

From master to slave

From slave to master

S

START condition

P

STOP condition

A

N

Acknowledge (ACK)

Not acknowledge (NACK)

Data

8 Bit

A

Read

S

Slave Addr

7 Bit

A

0

S

Slave Addr

7 Bit

1

A

Address

8 Bit

N P

Write

Data

8 Bit

A

Read

S

Slave Addr

7 Bit

A

A

Data

8 Bit

A

Data

8 Bit

...

Register Block Read (I²C Read)

3.8.3 Register Write

The ZOPT2202 registers can be written to individually or in block write mode. When two or more bytes are written in block write mode,

reserved registers and read-only registers are skipped. The transmitted data is automatically applied to the next writable register. If a register

includes read (R) and read/write (RW) bits, the register is not skipped. Data written to read-only bits are ignored.

If the last valid address of the ZOPT2202’s address range is reached but the master attempts to continue the block write operation, the

address counter of the ZOPT2202 will not roll over. The ZOPT2202 will return NACK for every following byte sent by the master until the I²C

operation is ended.

If a write access is started on an address of a non-writeable register, the ZOPT2202 will return NACK until the I²C operation is ended.

Write operations must follow the timing diagram in Figure 3.6.

Figure 3.6 I²C Register Write

From master to slave

From slave to master

S

START condition

P

STOP condition

A

N

Acknowledge (ACK)

Not acknowledge (NACK)

0

S

Slave Addr

7 Bit

A

Address

P

Register Write (I²C Write)

Write

Data

8 Bit

A

0

S

Slave Addr

7 Bit

A

Address

P

Write

Data

8 Bit

A

A

Data

8 Bit

A

Data

8 Bit

...

A

A

Register Block Write (I²C Write)