ISL70001ASEHFE datasheet(20/28 Pages) RENESAS

20 / 28 page

ISL70001ASEH

FN8365 Rev.3.03

Page 20 of 27

Sep 16, 2022

Another concern when selecting an output inductor is to ensure

there is adequate slope compensation when the regulator is

operated above 50% duty cycle. Since the internal slope

compensation is fixed, output inductance should satisfy

Equation 18 to ensure this requirement is met.

Input Capacitor Selection

Input capacitors are responsible for sourcing the AC component

of the input current flowing into the switching power devices.

Their RMS current capacity must be sufficient to handle the AC

component of the current drawn by the switching power devices,

which is related to duty cycle. The maximum RMS current

required by the regulator is closely approximated by Equation 19.

The important parameters to consider when selecting an input

capacitor are the voltage rating and the RMS ripple current

rating. For reliable operation, select capacitors with voltage

ratings at least 1.5x greater than the maximum input voltage.

The capacitor RMS ripple current rating should be higher than

the largest RMS ripple current required by the circuit.

Ceramic capacitors with X7R dielectric are recommended.

Alternately, a combination of low ESR solid tantalum capacitors

and ceramic capacitors with X7R dielectric may be used. The

ISL70001ASEH requires a minimum effective input capacitance

of 100µF for stable operation.

Derating Current Capability

Most space programs issue specific derating guidelines for parts,

but these guidelines take the pedigree of the part into account.

For instance, a device built to MIL-PRF-38535, such as the

ISL70001ASEH, is already heavily derated from a current density

standpoint. However, a mil-temp or commercial IC that is

up-screened for use in space applications may need additional

current derating to ensure reliable operation because it was not

built to the same standards as the ISL70001ASEH.

Figure 28 shows the maximum average output current of the

ISL70001ASEH with respect to junction temperature. These plots

take into account the worst-case current share mismatch in the

power blocks and the current density requirement of

MIL-PRF-38535 (< 2 x 105 A/cm2). The plot clearly shows that

the ISL70001ASEH can handle 12.1A at +125°C from a

worst-case current density standpoint, but the part is limited to

7.8A because that is the lower limit of the current limit threshold

with all six power blocks connected.

PCB Design

PCB design is critical to high-frequency switching regulator

performance. Careful component placement and trace routing

are necessary to reduce voltage spikes and minimize

undesirable voltage drops. Selection of a suitable thermal

interface material is also required for optimum heat dissipation

and to provide lead strain relief. See Table 1 on page 23 for

layout x-y coordinates.

PCB Plane Allocation

Four layers of 2-oz. copper are recommended. Layer 2 should be

a dedicated ground plane with all critical component ground

connections made with vias to this layer. Layer 3 should be a

dedicated power plane split between the input and output power

rails. Layers 1 and 4 should be used primarily for signals but can

also provide additional power and ground islands, as required.

LOUT

4.32µH

Number of LXx Pins Connected

-------------------------------------------------------------------------------



(EQ. 18)

IRMS

MAX

VOUT

VIN

-----------------

IOUT MAX



------

VIN VOUT

–

LOUT fs



----------------------------------

VOUT

VIN

-----------------







 2











(EQ. 19)

12.14

10.18

8.57

7.25

6.16

5.3

120

125

130

135

140

145

150

155

JUNCTION TEMPERATURE (°C)

MINIMUM OCP

LEVEL = 7.8A

6A AT +146°C

FIGURE 28. CURRENT vs TEMPERATURE

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