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9FGL0641CKILF Datasheet(PDF) 24 Page - Renesas Technology Corp |
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9FGL0641CKILF Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 37 page ![]() 24 ©2019-2022 Renesas Electronics Corporation December 1, 2022 9FGL02x1/04x1/06x1/08x1 Datasheet Table 28. Byte 10: PLL MN Enable, PD_Restore Register Byte 10 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Control Function M/N Programming Enable Restore Default Config. In PD Reserved Reserved Reserved Reserved Reserved Reserved Type RW RW 0 M/N Prog. Disabled Clear Config in PD 1 M/N Prog. Enabled Keep Config in PD Name PLL M/N En Power-Down (PD) Restore Default 0 1 x x x x x x Table 29. Byte 11: Stop State Control Register Byte 11 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Control Function Reserved Reserved Reserved Reserved Reserved Reserved True/Complement DIF Output Disable State Type RW RW 0 00 = Low/Low 01 = HiZ/HiZ 1 10 = High/Low 11 = Low/High Name STP[1] STP[0] Default x x x x x x 0 0 Table 30. Byte 12: Impedance Control Register 1 Byte 12 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Control Function Output impedance control [1:0] Output impedance control [1:0] Output impedance control [1:0] Output impedance control [1:0] Type RW RW RW RW RW RW RW RW 0 00 = 33ohm DIF Zout, 01 = 85ohm DIF Zout 10 = 100ohm DIF Zout, 11 = Reserved 1 9FGL08 Name DIF3_imp[1] DIF3_imp[0] DIF2_imp[1] DIF2_imp[0] DIF1_imp[1] DIF1_imp[0] DIF0_imp[1] DIF0_imp[0] 9FGL08 Default 9FGL0841 defaults to 0b10101010 9FGL0851 defaults to 0b01010101 9FGL06 Name DIF2_imp[1] DIF2_imp[0] DIF1_imp[1] DIF1_imp[0] Reserved Reserved DIF0_imp[1] DIF0_imp[0] 9FGL06 Default 9FGL0641 defaults to 0b1010xx10 9FGL0651 defaults to 0b0101xx01 9FGL04 Name DIF1_imp[1] DIF1_imp[0] Reserved Reserved DIF0_imp[1] DIF0_imp[0] Reserved Reserved |
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