ICS9DB823B datasheet(2/23 Pages) RENESAS

2 / 23 page

ICS9DB823B

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

IDT®

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

ICS9DB823B

REV F 091812

Pin Configuration

Power Groups

Bypass Readback Table

Frequency Selection

SRC_DIV# 1

48 VDDA

SRC_DIV# 1

48 VDDA

VDDR 2

47 GNDA

VDDR 2

47 GNDA

GND 3

46 IREF

GND 3

46 IREF

SRC_IN 4

45 LOCK

SRC_IN 4

45 LOCK

SRC_IN# 5

44 OE_7

SRC_IN# 5

44 OE7#

OE_0 6

43 OE_4

OE0# 643 OE4#

OE_3 7

42 DIF_7

OE3# 742 DIF_7

DIF_0 8

41 DIF_7#

DIF_0 8

41 DIF_7#

DIF_0# 9

40 OE_INV

DIF_0# 9

40 OE_INV

GND 10

39 VDD

GND 10

39 VDD

VDD 11

38 DIF_6

VDD 11

38 DIF_6

DIF_112

37 DIF_6#

DIF_112

37DIF_6#

DIF_1# 13

36 OE_6

DIF_1# 13

36 OE6#

OE_1 14

35 OE_5

OE1# 14

35 OE5#

OE_2 15

34 DIF_5

OE2# 15

34 DIF_5

DIF_216

33 DIF_5#

DIF_216

33DIF_5#

DIF_2# 17

32 GND

DIF_2# 17

32 GND

GND 18

31 VDD

GND 18

31 VDD

VDD 19

30 DIF_4

VDD 19

30 DIF_4

DIF_320

29 DIF_4#

DIF_320

29DIF_4#

DIF_3# 21

28 HIGH_BW#

DIF_3# 21

28 HIGH_BW#

BYPASS#_133_100 22

27 DIF_STOP#

BYPASS#_133_100 22

27 DIF_STOP

SCLK 23

26 PD#

SCLK 23

26 PD#

SDATA 24

25 GND

SDATA

25 GND

OE_INV = 0

OE_INV = 1

Note: Pin 26 is always active low. This is different than

9DB803.

48-pin SSOP and TSSOP

VDD

GND

SRC_IN/SRC_IN#

11,19,31,39

10,18, 25,32

DIF(7:0)

N/A

IREF

Analog VDD & GND for PLL core

Description

Pin Number

BYPASS#_133_100

Byte0, bit 3

Byte 0 bit 1

Low

Mid

High

BYPASS#_133_100

Voltage

MODE

Low

<0.8V

Bypass

Mid

1.2<Vin<1.8V QPI 133MHz

High

Vin > 2.0V

PCIe 100MHz

ICS9DB823B Datasheet(PDF) 2 Page - Renesas Technology Corp

ICS9DB823B Datasheet(HTML) 2 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Datasheet Download

Link URL