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AT90SC6404RT Datasheet(PDF) 52 Page - ATMEL Corporation

Part # AT90SC6404RT
Description  Security Target Lite
PDF  65 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90SC6404RT Datasheet(HTML) 52 Page - ATMEL Corporation

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General Business Use
TPG0053A (24 Nov 04)
6.1.2
Protected Test Memory Access (SF2)
138
SF2 shall ensure that, although authenticated users can have access to memories
using commands in test mode, they cannot access directly their contents.
139
Only authorized design and production engineers running test on the TOE have access
to the TME conditions.
140
The Strength of Function claimed for the Protected Test Memory Access security
function is high.
6.1.3
Test Mode Disable (SF3)
141
SF3 shall make provision for wafer sawing which, once done, shall ensure that none of
the test features are available, not even to authenticated users in test mode.
6.1.4
TOE Testing (SF4)
142
SF4 shall provide embedded hardware test circuitry with high fault coverage to prevent
faulty devices being released in the field. Devices with manufacturing problems (short
circuits, open nets, ...) could lead to a poor level of security by disabling some security
functions.
143
Testing of security functions is dependent on a fault free and fully functional TOE. The
RAM, ROM, and standard cell logic (including the MCU) is tested by functional tests
under the control of the test interface circuit. EEPROM is tested through the test
interface circuit by external stimulus. CPU to EEPROM data flow will also be tested by
functional tests, run from the EEPROM, using test software loaded under the control of
the test interface circuit.
144
To conform with ISO 7816 standards the TOE embedded software will always return an
Answer-To-Reset command via the serial I/O port. This contains messages with
information on the integrity and identification of the device. An ATR also verifies
significant portions of device hardware (CPU, ROM, EEPROM and logic).
6.1.5
Data Error Detection (SF5)
145
SF5 shall provide means for performing data error detection.
146
Means of performing checksum error detection and parity error detection is provided.
The 32-bit Checksum Accelerator or the CRC-16 hardware peripheral can be used by
the embedded software to compute fast data error detection on the program and/or
data memories before starting any operation.



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