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74FCT16543ATPVG Datasheet(PDF) 2 Page - Renesas Technology Corp |
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74FCT16543ATPVG Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 8 page ![]() 2 INDUSTRIALTEMPERATURERANGE IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER PIN CONFIGURATION TOP VIEW 1 B1 1 B2 GND 1 B3 1 B4 VCC 1 B5 1 B6 1 OEBA 1 B7 1 B8 2 B1 2 B2 GND 2 B3 2 B4 VCC 2 B5 GND 2 B7 2 B6 2 B8 GND 2 OEBA GND 1 A1 1 A2 VCC 1 A3 1 A4 GND 1 A5 1 A6 1 A7 1 A8 GND 2 A1 2 A2 VCC 2 A3 2 A5 2 A4 2 A7 GND 2 A8 2 A6 2 OEAB 2 LEAB 2 CEAB 1 CEAB 1 LEAB 1 OEAB 1 LEBA 1 CEBA 2 LEBA 2 CEBA 47 37 38 39 40 41 42 43 44 45 46 33 34 35 36 56 55 49 50 51 52 53 54 48 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 29 30 31 32 25 26 27 28 PIN DESCRIPTION Pin Names Description xOEAB A-to-B Output Enable Input (Active LOW) xOEBA B-to-A Output Enable Input (Active LOW) xCEAB A-to-B Enable Input (Active LOW) xCEBA B-to-A Enable Input (Active LOW) xLEAB A-to-B Latch Enable Input (Active LOW) xLEBA B-to-A Latch Enable Input (Active LOW) xAx A-to-BDataInputsorB-to-A3-StateOutputs xBx B-to-ADataInputsorA-to-B3-StateOutputs PackageType PackageCode Order Code TSSOP PAG56 PAG SSOP PVG56 PVG Symbol Description Max Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to 7 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA ABSOLUTE MAXIMUM RATINGS(1) NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Outputs and I/O terminals for FCT162XXX. Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6 pF COUT Output Capacitance VOUT = 0V 3.5 8 pF CAPACITANCE (TA=+25°C,f=1.0MHz) NOTE: 1. This parameter is measured at characterization but not tested. NOTES: 1. * Before xLEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care 2. A-to-B data flow shown; B-to-A flow control is the same, except using xCEBA, xLEBA and xOEBA. FUNCTION TABLE(1,2) For A-to-B (Symmetric with B-to-A) Latch Output Inputs Status Buffers xCEAB xLEAB xOEAB xAx to xBx xBx H X X Storing Z X H X Storing X L L L Transparent Current A Inputs L H L Storing Previous* A Inputs L L H Transparent Z L H H Storing Z |
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