4

ICS95V850

0458G—11/21/08

Timing Requirements

TA = 0 - 85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Operating clock frequency

freqop

66

210

MHz

Input clock duty cycle

dtin

40

60

%

CLK stabilization

TSTAB

15

µs

Recommended Operating Condition (see note1)

TA = 0 - 85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Voltage

VDD, AVDD

2.3

2.5

2.7

V

CLK_INT, CLK_INC, FB_INC

0.4

VDD/2 - 0.18

V

CLK_INT, CLK_INC (Universal Input)

-0.3

VDD - 0.4

V

CLK_INT, CLK_INC, FB_INC

VDD/2 + 0.18

2.1

V

CLK_INT, CLK_INC (Universal Input)

0.4

VDD + 0.3

V

DC input signal voltage

(note 2)

VIN

-0.3

VDD + 0.3

V

DC - CLK_INT, FB_INT

0.36

VDD + 0.6

V

AC - CLK_INT, FB_INT (Universal Input)

0.4

VDD + 0.6

V

Output differential cross-

voltage (note 4)

VOX

VDD/2 - 0.15

VDD/2 + 0.15

V

Input differential cross-

voltage (note 4)

VIX

(Universal Input)

0.45(VIH - VIL)

0.55(VIH - VIL)V

High level output

current

IOH

-6.4

mA

Low level output current

IOL

5.5

mA

Operating free-air

temperature

TA

085

°C

Differential input signal

voltage (note 3)

VID

Low level input voltage

VIL

High level input voltage

VIH

Notes:

1.

Unused inputs must be held high or low to prevent them from floating.

2.

DC input signal voltage specifies the allowable DC execution of differential input.

3.

Differential inputs signal voltages specifies the differential voltage [VTR-VCP]

required for switching, where VT is the true input level and VCP is the

complementary input level.

4.

Differential cross-point voltage is expected to track variations of VDD and is the

voltage at which the differential signal must be crossing.