4

ICS9169-01

Electrical Characteristics at 3.3 V

VDD = 3.0 - 3.7 V, TA = 0 - 70

oC unless otherwise stated

Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.

AC Characteristics

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Rise Time1

Tr1

20pF load, 0.8 to 2.0V

PCLK & BCLK

-0.9

1.5

ns

Fall Time1

Tf1

20pF load, 2.0 to 0.8V

PCLK & BCLK

-0.8

1.4

ns

Rise Time1

Tr2

20pF load, 20% to 80%

PCLK & BCLK

-1.5

2.5

ns

Fall Time1

Tf2

20pF load, 80% to 20%

PCLK & BCLK

-1.4

2.4

ns

Duty Cycle1

Dt

20pF load

@ VOUT = 1.4 V

45

50

55

%

Jitter, One Sigma1

Tj1s1

PCLK & BCLK Clocks;

Load=20pF,

FOUT >25 MHz

-

50

150

ps

Jitter, Absolute1

Tjab1

PCLK & BCLK Clocks;

Load=20pF,

FOUT >25 MHz

-250

-

250

ps

Jitter, One Sigma1

Tj1s2

Fixed CLK; Load=20pF

-

1

3

%

Jitter, Absolute1

Tjab2

Fixed CLK; Load=20pF

-5

2

5

%

Input Frequency1

Fj

12.0

14.318

16.0

MHz

Logic Input

Capacitance1

CIN

Logic input pins

-

5

-

pF

Crystal Oscillator

Capacitance1

CINX

X1, X2 pins

-

18

-

pF

Power-on Time1

ton

From VDD=1.6V to 1st

crossing of 66.5 MHz VDD

supply ramp < 40 ms

-2.5

4.5

ms

Frequency Settling

Time1

ts

From 1st crossing of

acquisition to < 1% settling

-2.0

4.0

ms

Clock Skew

Window1

Tsk1

PCLK to PCLK;

Load=20pF; @1.4V

-

150

250

ps

Clock Skew

Window1

Tsk2

BCLK to BCLK;

Load=20pF; @1.4V

-

300

500

ps

Clock Skew

Window1

Tsk3

PCLK to BCLK;

Load=20pF; @1.4V

12.6

5

ns