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S71PL-N Datasheet(PDF) 13 Page - SPANSION |
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S71PL-N Datasheet(HTML) 13 Page - SPANSION |
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13 / 14 page ![]() December 8, 2006 S71PL-N_00_A9 S71PL-N MirrorBit TM MCPs 11 Da t a Sh ee t 6. Revision History Section Description Revision A (March 11, 2005) Initial release Revision A1 (April 27, 2005) Performance Characteristics pSRAM Density table Added 128 Mb pSRAM device Ordering Information and Valid Combination tables Updated options to include 128 Mb pSRAM device Block Diagram Changed chip enable pin from CE#f1 to F1-CE# Physcial Dimensions/Connection Diagrams Replaced VBH084 with TLA084 and VSA084 Replaced VBU056 with TLC056 VCC Power Up Changed tVCS speed from 30 µs to 50 µs DC Characteristics Changed ICC4 Max. to 50 µA Revision A2 (August 18, 2005) Global Removed all references to 56-ball package Performance Characteristis Updated the product selector tables Ordering Information Updated model number Valid Combinations table Added new ordering options Connection Diagram Updated the PL127N connection diagram Updated the PL12xN connection diagram Revision A3 (October 21, 2005) Performance Characteristics Updated the Typical Sector Erase times Revision A4 (November 29, 2005) Global Added the 1.2 mm option to S71PL256ND0 Updated the S29PL-N Flash data sheet Revision A5 (January 3, 2006) Global Changed the name of in F3 from A14 to A4 in pinout figure of section 3.2 Removed all references to Type 6 pSRAMs from the Product Selector Guide Added a document reference table Modified the Package Type and Material options Removed the VSA084 package option Removed the datasheet from the MCP wrapper Revision A6 (April 12, 2006) Global Added pSRAM Type 7 as an option to S71PL127NB0 and S71PL129NB0 Revision A7 (September 6, 2006) Global Updated document to new template. Revision A8 (October 6, 2006) Global Added 32 Mb pSRAM Type 8 to the valid combinations Revision A9 (December 8, 2006) Global Added 64 Mb pSRAM Type 8 to the valid combinations. |
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