Product Brief

CP1181

OPTRANS Series

21 Channel E1/T1 Mapper

CP1181_PB_Rev1.0

March, 2005

Copyright ©2005 Chiphomer Technology Limited

Page 2 of 2

Supports1+1 Path-protection

Integrated bit-leaking circuit and DPLL

The output jitter of E1/T1 data (either mapping jitter or combined jitter) is compliant with G.783 (2000/10)

E1/T1 Port #0 to Port #7 can be configured to work in re-timing mode

Supports the code-rate adjustment

Optionally inserts VC-AIS and TU-AIS into upstream data

Generates the TU12 pointer (V1, V2) per ITU G.783

The TU12 pointer value is fixed on 105

Calculates the BIP-2 and inserts into outgoing data stream, optionally inserts single or continued BIP-2 errors

Inserts RDI/REI from either internal generation or microprocessor

Inserts 16-byte programmable J2 sequence

Inserts E-RDI from either internal generation or microprocessor

Inserts programmable N2 byte and O bits

Controlled High-Z output on transmit Telecom Bus

Provides three bus timing modes for transmit Telecom Bus

Build-in PRBS test function can be configured to any one of all 21 E1/T1 ports

Provides 16-bit Intel/Motorola microprocessor interface

3.3V supply with 5V tolerant I/O

IEEE 1149.1 JTAG boundary scan

Maximum power less than 1.0 Watt

Operating industrial temperature range: -40℃ ~ 85℃

PBGA256 package

APPLICATIONS

SDH Add/Drop Multiplexers

SDH Terminal Multiplexers

Multi-service Transport Platform (MSTP)

TYPICAL APPLICATION

21ch E1/T1 Mapper

CP1181

8ch LIU

CH5008

8ch LIU

CH5008

8ch E1/T1

LIU

CP5009

Add Bus A

Add Bus B

Drop Bus A

Drop Bus B

19.44MHz Telecom Bus

21 E1/T1