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ADP1864AUJZ-R7 Datasheet(PDF) 15 Page - Analog Devices |
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ADP1864AUJZ-R7 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 16 page ![]() ADP1864 Rev. 0 | Page 15 of 16 OUTLINE DIMENSIONS 13 4 5 2 6 2.90 BSC 1.60 BSC 2.80 BSC 1.90 BSC 0.95 BSC 0.20 0.08 8° 4° 0° 0.50 0.30 0.10 MAX *0.90 0.87 0.84 SEATING PLANE *1.00 MAX 0.60 0.45 0.30 PIN 1 INDICATOR *COMPLIANT TO JEDEC STANDARDS MO-193-AA WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. Figure 20. 6-Lead Thin Small Outline Transistor Package [TSOT] (UJ-6) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Branding ADP1864AUJZ-R71 −40°C to +85°C 6-Lead Thin Small Outline Transistor Package (TSOT) UJ-6 P0N ADP1864-EVAL2 −40°C to +85°C Evaluation Board 1 Z = Pb-free part. 2 VOUT 2.5 V (variable), ILOAD = 0 A to 3 A, VIN = 3.15 V to 14 V. |
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