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ADT7462 Datasheet(PDF) 21 Page - Analog Devices

Part # ADT7462
Description  Flexible Temperature and Voltage Monitor and System Fan Controller
PDF  92 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADT7462 Datasheet(HTML) 21 Page - Analog Devices

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ADT7462
Rev. 0 | Page 21 of 92
READ OPERATIONS
The ADT7462 uses the following SMBus read protocols.
Receive Byte
The receive byte is useful when repeatedly reading a single
register. The register address needs to have been set up
previously. In this operation, the master device receives a single
byte from a slave device as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
read bit (high).
3.
The addressed slave device asserts an ACK on SDA.
4.
The master receives a data byte.
5.
The master asserts a NO ACK on SDA.
6.
The master asserts a stop condition on SDA and the
transaction ends.
In the ADT7462, the receive byte protocol is used to read a
single byte of data from a register whose address has previously
been set by a send byte or write byte operation.
23
14
6
5
SLAVE
ADDRESS
SR
DATA
P
A
A
Figure 31. Single Byte Read from a Register
Block Read
In this operation, the master device reads a block of data from
a slave device. The start address for a block read must have been
set previously, as well as the number of bytes to be read
(maximum = 32). In the case of the ADT7462, the start address
is activated by a send byte operation to set a RAM address. The
number of bytes to be read should be written to the #Bytes bits
in the Configuration 0 register. The block read operation
consists of a send byte operation that sends a block read
command to the slave, immediately followed by a repeated start
and a read operation that reads out multiple data bytes, as
follows:
1.
The master device asserts a start condition on the SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an ACK on the SDA.
4.
The master sends a command code that tells the slave
device to expect a block read. The ADT7462 command
code for a block read is 0xA1 (1010 0001).
5.
The slave asserts an ACK on SDA.
6.
The master asserts a repeat start condition on the SDA.
7.
The master sends the 7-bit slave address followed by the
read bit (high).
8.
The slave asserts an ACK on the SDA.
9.
The ADT7462 sends a byte count telling the master how
many data bytes to expect. The maximum number of bytes
is 32.
10. The master asserts an ACK on SDA.
11. The master receives the expected number of data bytes.
12. The master asserts an ACK on SDA after each data byte.
13. The ADT7462 issues a PEC byte to the master. The master
should check the PEC byte and issue another block read if
the PEC byte is incorrect.
14. A NO ACK is generated after the PEC byte to signal the
end of the read.
15. The master asserts a stop condition on the SDA to end the
transaction.
S
SLAVE
ADDRESS WA
COMMAND
A1h BLOCK
READ
A
S
R
AP
DATA
32
PEC
A
BYTE
COUNT A DATA 1 A
SLAVE
ADDRESS
A
1
8
9
10
12
13
14 15
11
23
4
5
6
7
Figure 32. Block Read from RAM
Note that although the ADT7462 supports packet error
checking (PEC), its use is optional. The PEC byte is calculated
using CRC-8. The frame check sequence (FCS) conforms to
CRC-8 by the polynomial
()
1
1
2
8
+
+
+
=
x
x
x
x
C
Consult the SMBus 1.1 specifications for more information.



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