BSP250 datasheet(3/12 Pages) PHILIPS

3 / 12 page

1997 Jun 20

Philips Semiconductors

Product speciﬁcation

P-channel enhancement mode

vertical D-MOS transistor

BSP250

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. Pulse width and duty cycle limited by maximum junction temperature.

2. Device mounted on an epoxy printed-circuit board, 40

× 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VDS

drain-source voltage (DC)

−−30

VGSO

gate-source voltage (DC)

open drain

−±20

drain current (DC)

Ts ≤ 100 °C

−−3A

IDM

peak drain current

note 1

−−12

Ptot

total power dissipation

Ts = 100 °C

−

Tamb =25 °C; note 2

−

1.65

Tstg

storage temperature

−65

+150

°C

operating junction temperature

−

150

°C

Source-drain diode

source current (DC)

Ts ≤ 100 °C

−−1.5

ISM

peak pulsed source current

note 1

−−6A

Fig.2 Power derating curve.

handbook, halfpage

200

2.0

0.4

0.8

1.2

1.6

MLB885

Tamb (°C)

100

150

Ptot

(W)

δ = 0.01.

Soldering point temperature Ts = 100 °C.

(1) RDSon limitation.

Fig.3 SOAR.

handbook, halfpage

MLB835

VDS (V)

(A)

−10−1

−102

−1

−10

−10−2

−102

−10−1

−1

−10

δ =

1 ms

(1)

tp =

µs

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