CDB61884

DS485DB1

3

5. CS61884 CONFIGURATION SCREENS ............................................................................... 12

5.1 Choose Parallel Port Settings .......................................................................................... 12

5.2 Access and Configure the Read / Write Registers .......................................................... 12

5.2.1 Access Configuration Screens ............................................................................ 12

5.2.2 Select Register to Configure ............................................................................... 12

5.3 Loopback /Bits Clock Screen ........................................................................................... 13

5.4 LOS/AIS/DFM/JA Register Screen .................................................................................. 14

5.5 Transmitter Register Screen ............................................................................................ 15

5.6 AWG Register Screen ..................................................................................................... 16

5.7 Global Control Register Screen ....................................................................................... 17

6. BOARD CONFIGURATIONS ................................................................................................. 18

6.1 E1 75

Ω Mode Setup ....................................................................................................... 18

6.2 E1 120

Ω Mode Setup ..................................................................................................... 19

6.3 T1/J1 100

Ω Mode Setup ................................................................................................ 20

7. EVALUATION HINTS ............................................................................................................. 21

LIST OF FIGURES

Figure 1. CDB61884 Board Layout ................................................................................................. 4

Figure 2. On-board Logic Power Selection ..................................................................................... 5

Figure 3. Master Clock Selections .................................................................................................. 5

Figure 4. Hardware/Host Mode Selection ....................................................................................... 6

Figure 5. Transmitter Enable Selection........................................................................................... 7

Figure 6. Clock Edge Selection....................................................................................................... 7

Figure 7. Jitter Attenuator Selection................................................................................................ 7

Figure 8. Loopback Mode Selection................................................................................................ 7

Figure 9. Switch S9 Settings ........................................................................................................... 8

Figure 10. Digital Signal Control/Access......................................................................................... 9

Figure 11. CDB61884 Software Opening Screen ......................................................................... 10

Figure 12. Register Bit Box ........................................................................................................... 10

Figure 13. Set All Button ............................................................................................................... 10

Figure 14. Clear All Button ............................................................................................................ 11

Figure 15. Write All Button ............................................................................................................ 11

Figure 16. Read All Button ............................................................................................................ 11

Figure 17. Write Button ................................................................................................................. 11

Figure 18. Read Button ................................................................................................................. 11

Figure 19. Opening Screen for Port and Address Selection Screen ............................................. 12

Figure 20. Loopback/G.703 Bits Clock Selection Screen ............................................................. 13

Figure 21. LOS/AIS/DFM/JA ERR Status/Enable Selection Screen ............................................. 14

Figure 22. Transmitter Register Screen ........................................................................................ 15

Figure 23. AWG Registers Screen................................................................................................ 16

Figure 24. Global Control Screen.................................................................................................. 17

LIST OF TABLES

Table 1. External Impedance Resistor Values ...................................................................................... 6

Table 2. Protection Resistor Selection ................................................................................................. 6

Table 3. Switch Settings for Host Mode ................................................................................................9

Table4. E175

Ω Operational Mode Switch/Jumper Position ............................................................. 18

Table5. E1120

Ω Operational Mode Switch/Jumper Position ........................................................... 19

Table 6. T1/J1 100

Ω Operational Mode Switch/Jumper Position....................................................... 20