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MPC106ARX66CG Datasheet(PDF) 13 Page - Motorola, Inc

Part # MPC106ARX66CG
Description  PCI Bridge/Memory Controller
PDF  28 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MPC106ARX66CG Datasheet(HTML) 13 Page - Motorola, Inc

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MPC106 PCI Bridge/Memory Controller Hardware Specifications
13
Electrical and Thermal Characteristics
Figure 6 provides the JTAG clock input timing diagram.
Figure 6. JTAG Clock Input Timing Diagram
Figure 7 provides the TRST timing diagram.
Figure 7. TRST Timing Diagram
6
Boundary-scan input data setup time
5
—
ns
3
7
Boundary-scan input data hold time
15
—
ns
3
8
TCK to output data valid
0
30
ns
4
9
TCK to output high impedance
0
30
ns
4
10
TMS, TDI data setup time
5
—
ns
—
11
TMS, TDI data hold time
15
—
ns
1
12
TCK to TDO data valid
0
15
ns
—
13
TCK to TDO high impedance
0
15
ns
—
Notes:
1 These values are guaranteed by design, and are not tested
2 TRST is an asynchronous signal. The setup time is for test purposes only.
3 Non-test signal input timing with respect to TCK.
4 Non-test signal output timing with respect to TCK.
Table 9. JTAG AC Timing Specifications (Independent of SYSCLK) (Continued)
Num
Characteristic
Min
Max
Unit
Notes
TCK
2
2
1
3
3
VM = Midpoint Voltage (1.4 V)
VM
VM
VM
4
5
TRST
TCK



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