IDT7134LA55L48I datasheet(5/11 Pages) IDT

5 / 11 page

IDT7134SA/LA

High-Speed 4K x 8 Dual-Port Static SRAM

Military, Industrial and Commercial Temperature Ranges

VCC

DATA RETENTION MODE

4.5V

VDR

≥ 2V

VDR

VIH

tCDR

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Data Retention Characteristics Over All Temperature Ranges

(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V

Data Retention Waveform

AC Test Conditions

Figure 1. AC Output Test Load

Figure 2. Output Test Load

(for tLZ, tHZ, tWZ, tOW)

*Including scope and jig

+5V

1250

Ω

30pF

775

Ω

DATAOUT

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+5V

1250

Ω

5pF *

775

Ω

DATAOUT

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NOTES:

1. VCC = 2V, TA = +25°C, and are not production tested.

2. tRC = Read Cycle Time.

3. This parameter is guaranteed by device characterization, but not production tested.

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

GND to 3.0V

5ns

1.5V

Figures 1 and 2

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Symbol

Parameter

Test Condition

Min.

Typ.(1)

Max.

Unit

VDR

VCC for Data Retention

VCC = 2V

2.0

___

ICCDR

Data Retention Current

> VHC

VIN > VHC or < VLC

MIL. & IND.

___

100

4000

µA

COM'L.

___

100

1500

tCDR(3)

Chip Deselect to Data Retention Time

___

tR(3)

Operation Recovery Time

tRC(2)

___

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