Nexperia

XC7WH126

Dual buffer/line driver; 3-state

VM

VM

tW

tW

10 %

90 %

0 V

VI

VI

negative

pulse

positive

pulse

0 V

VM

VM

90 %

10 %

tf

tr

tr

tf

001aad983

DUT

VCC

VCC

VI

VO

RT

RL

S1

CL

open

G

Test data is given in Table 10.

Definitions test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

CL = Load capacitance including jig and probe capacitance.

RL = Load resistance.

S1 = Test selection switch.

Fig. 7. Test circuit for measuring switching times

Table 10. Test data

Input

Load

S1 position

Type

VI

tr, tf

CL

RL

tPHL, tPLH

tPZH, tPHZ

tPZL, tPLZ

XC7WH126

VCC

≤ 3 ns

15 pF, 50 pF 1 kΩ

open

GND

VCC

XC7WH126

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© Nexperia B.V. 2019. All rights reserved

Product data sheet

Rev. 3 — 25 February 2019

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