Nexperia

74LVC2G241

Dual buffer/line driver; 3-state

11.1. Waveforms and test circuit

mna230

tPHL

tPLH

VM

VM

nA input

nY output

GND

VI

VOH

VOL

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 5. The data input (nA) to output (nY) propagation delays

Table 9. Measurement points

Supply voltage

Input

Output

VCC

VM

VM

VX

VY

1.65 V to 1.95 V

0.5 x VCC

0.5 x VCC

VOL + 0.15 V

VOH - 0.15 V

2.3 V to 2.7 V

0.5 x VCC

0.5 x VCC

VOL + 0.15 V

VOH - 0.15 V

2.7 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

3.0 V to 3.6 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

4.5 V to 5.5 V

0.5 x VCC

0.5 x VCC

VOL + 0.3 V

VOH - 0.3 V

mna730

tPLZ

tPHZ

outputs

disabled

outputs

enabled

VY

VX

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

1OE input

VOL

VOH

VCC

VI

VM

GND

GND

tPZL

tPZH

VM

VM

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 6. Enable and disable times for input 1OE

74LVC2G241

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Nexperia B.V. 2019. All rights reserved

Product data sheet

Rev. 16 — 31 July 2019

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