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UPB1007K Datasheet(PDF) 4 Page - Renesas Technology Corp |
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UPB1007K Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 29 page ![]() Data Sheet PU10014EJ02V0DS 2 µµµµPB1007K PRODUCT LINE-UP (TA = +25 °°°°C, VCC = 3.0 V) Type Part Number Functions (Frequency unit: MHz) VCC (V) ICC (mA) CG (dB) Package Status µPB1007K Pre-amplifier + RF/IF down-converter + PLL synthesizer REF = 16.368 1stIF = 61.380/2ndIF = 4.092 2.7 to 3.3 25.0 100 to 120 36-pin plastic QFN New Device µPB1005GS 30-pin plastic SSOP Clock Frequency Specific 1 chip IC µPB1005K RF/IF down-converter + PLL synthesizer REF = 16.368 1stIF = 61.380/2ndIF = 4.092 2.7 to 3.3 45.0 76 to 96 36-pin plastic QFN Available Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. To know the associated products, please refer to their latest data sheets. SYSTEM APPLICATION EXAMPLE GPS receiver RF block diagram 1 600f0 RF-MIXout 60f0 1540f0 BPF BPF IF-MIXin IF-MIXout 4f0 BPF 2ndIFin1 VGC 2ndIFin2 2ndIFbypass 2ndIF-Amp IF-MIX 4.092 MHz 16f0 to Demdulator Buffer to Demdulator REF 1/2 PD 8f0 8f0 8f0 16f0 LOout 64f0 1/8 1/25 1stLO-OSC2 1stLO-OSC1 TCXO 16.368 MHz 4f0 REFout2 Buffer 16.368 MHz RF-MIX Pre-Amp OSC 1575.42 MHz from Antenna CHARGE PUMP LOOP FILTER • PB1007K is in •f0 = 1.023 MHz in the diagram µ Caution This diagram schematically shows only the µµµµPB1007K’s internal functions on the system. This diagram does not present the actual application circuits. |
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