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UPC4071 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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UPC4071 Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 14 page ![]() Data Sheet G15204EJ4V0DS 3 µµµµPC4071 ELECTRICAL CHARACTERISTICS (TA = 25°C, V ±±±± = ±±±±15 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage VIO RS ≤ 50 Ω±3 ±10 mV Input Offset Current Note 7 IIO ±5 ±50 pA Input Bias Current Note 7 IB 30 200 pA Large Signal Voltage Gain AV RL ≥ 2 kΩ , VO = ±10 V 25000 200000 Supply Current ICC IO = 0 A 2.0 2.7 mA Common Mode Rejection Ratio CMR 70 86 dB Supply Voltage Rejection Ratio SVR 70 86 dB RL ≥ 10 kΩ±12 ±13.5 V Output Voltage Swing Vom RL ≥ 2 kΩ±10 ±12 V Common Model Input Voltage Range VICM ±10 V Slew Rate SR AV = 1 13 V/ µs Unity Gain Frequency funity 3MHz Input Equivalent Noise Voltage Vn RS = 100 Ω, f = 10 Hz to 10 kHz 4 µVr.m.s. Input Equivalent Noise Voltage Density en RS = 100 Ω, f = 1 kHz 18 nV/ √Hz Input Offset Voltage VIO RS ≤ 50 Ω, TA = –20 to +70°C ±13mV Average VIO Temperature Drift ∆VIO/∆TTA = –20 to +70°C ±10 µV/°C Input Offset Current Note 7 IIO TA = –20 to +70°C ±2nA Input Bias Current Note 7 IB TA = –20 to +70°C7 nA Notes 7. Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain the junction temperature close to the operating ambient temperature. |
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