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UPC4092 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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UPC4092 Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 12 page ![]() Data Sheet G13905EJ2V0DS 3 µPC4092 ELECTRICAL CHARACTERISTICS (TA = 25 °C, V± = ±15 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage VIO RS ≤ 50 Ω ±1 ±3 mV Input Offset Current Note 7 IIO ±25 ±100 pA Input Bias Current Note 7 IB 50 200 pA Large Signal Voltage Gain AV RL ≥ 2 kΩ , VO = ±10 V 25000 200000 Supply Current Note 8 ICC IO = 0 A 5 6.8 mA Common Mode Rejection Ratio CMR 70 100 dB Supply Voltage Rejection Ratio SVR 70 100 dB RL ≥ 10 kΩ ±12 +14.0 –13.3 V Output Voltage Swing Vom RL ≥ 2 kΩ ±10 +13.5 –12.8 V Common Model Input Voltage Range VICM ±11 +14 –12 V Slew Rate SR AV = 1 15 V/ µs Unity Gain Frequency funity 4 MHz Input Equivalent Noise Voltage Density en RS = 100 Ω, f = 1 kHz 19 nV/ √Hz Channel Separation 120 dB Input Offset Voltage VIO RS ≤ 50 Ω, TA = –20 to +70 °C ±5 mV Average VIO Temperature Drift ∆VIO/∆T TA = –20 to +70 °C ±7 µV/°C Input Offset Current Note 7 IIO TA = –20 to +70 °C ±2 nA Input Bias Current Note 7 IB TA = –20 to +70 °C 7 nA Notes 7. Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain the junction temperature close to the operating ambient temperature. 8. This current flows irrespective of the existence of use. |
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