Nexperia

74ALVC573

Octal D-type transparent latch; 3-state

-40 °C to +85 °C

Symbol Parameter

Conditions

Min

Typ[1]

Max

Unit

per latch; VI = GND to VCC; VCC = 3.3 V

[3]

outputs HIGH or LOW state

-

37

-

pF

CPD

power dissipation

capacitance

outputs 3-state

-

7

-

pF

[1] Typical values are measured at Tamb = 25 °C

[2] tpd is the same as tPHL and tPLH.

ten is the same as tPZH and tPZL.

tdis is the same as tPHZ and tPLZ.

[3] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

Σ(CL x VCC 2 x fo) = sum of the outputs

10.1. Waveforms and test circuit

mna811

Dn input

Qn output

tPHL

tPLH

GND

VI

VM

VM

VOH

VOL

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage levels that occur with the output load.

Fig. 9. Input Dn to output Qn propagation delay times

Table 8. Measurement points

Supply voltage

Output

VCC

VM

VX

VY

1.65 V to 1.95 V

0.5VCC

VOL + 0.15 V

VOH - 0.15 V

2.3 V to 2.7 V

0.5VCC

VOL + 0.15 V

VOH - 0.15 V

2.7 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

3.0 V to 3.6 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

74ALVC573

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 4 — 30 April 2021

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