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MP8861 Datasheet(PDF) 6 Page - Monolithic Power Systems

Part # MP8861
Description  2.85V - 18V, 6A, High-Efficiency, Wide-Input,Synchronous, Step-Down Converter with Integrated Telemetry via I2C Interface
PDF  37 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP8861 Datasheet(HTML) 6 Page - Monolithic Power Systems

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MP8861 – 2.85V - 18V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER
MP8861 Rev. 1.1
www.MonolithicPower.com
6
5/28/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
I/O LEVEL CHARACTERISTICS
Parameter
Symbol Condition
HS-Mode
LS-Mode
Units
Min
Max
Min
Max
Low-level input voltage
VIL
-0.5
0.3VCC
-0.5
0.3VCC
V
High-level input voltage
VIH
0.7VCC
VCC +
0.5
0.7VCC
VCC +
0.5
V
Hysteresis of Schmitt trigger
inputs
VHYS
VCC > 2V
0.05VCC
-
0.05VCC
-
V
VCC < 2V
0.1VCC
-
0.1VCC
-
Low-level output voltage
(open drain) at 3mA sink
current
VOL
VCC > 2V
0
0.4
0
0.4
V
VCC < 2V
0
0.2VCC
0
0.2VCC
Low-level output current
IOL
-
3
-
3
mA
Transfer gate on resistance
for currents between SDA
and SCAH, or SCL and
SCLH
RonL
VOL level, IOL = 3mA
-
50
-
50
Ω
Transfer gate on resistance
between SDA and SCAH, or
SCL and SCLH
RonH
Both signals (SDA and
SDAH, or SCL and SCLH)
at VCC level
50
-
50
-
kΩ
Pull-up current of the SCLH
current source
Ics
SCLH output levels
between 0.3Vcc and
0.7VCC
2
6
2
6
mA
Rise time of the SCLH or
SCL signal
τrCL
Output rise time (current
source enabled) with an
external pull-up current
source of 3mA
Capacitive load from 10pF
to 100pF
10
40
ns
Capacitive load of 400pF
20
80
ns
Fall time of the SCLH or SCL
signal
τfCL
Output fall time (current
source enabled) with an
external pull-up current
source of 3mA
Capacitive load from 10pF
to 100pF
10
40
ns
Capacitive load of 400pF
20
80
20
250
ns
Rise time of SDAH signal
τrDA
Capacitive load from 10pF
to 100pF
10
80
-
-
ns
Capacitive load of 400pF
20
160
20
250
ns
Fall time of SDAH signal
τfDA
Capacitive load from 10pF
to 100pF
10
80
-
-
ns
Capacitive load of 400pF
20
160
20
250
ns
Pulse width of spikes that
must be suppressed by the
input filter
tSP
0
10
0
50
ns
Input current each I/O pin
Ii
Input voltage between
0.1VCC and 0.9VCC
-
10
-10
+10
µA
Capacitance for each I/O pin
Ci
-
10
-
10
pF



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