Analog Integrated Circuit Device Data

4

Freescale Semiconductor

34653

ELECTRICAL CHARACTERISTICS

MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

MAXIMUM RATINGS

Table 2. Maximum Ratings

All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or

permanent damage to the device.

Ratings

Symbol

Value

Unit

ELECTRICAL RATINGS

Power Supply Voltage

85

V

Power MOSFET Energy Capability

Varies (1)

mJ

Continuous Output Current (2)

1.0

A

Maximum Voltage

DISABLE Pin

ILIM and ICHG Pins

PG

—

—

—

—

5.0

85

85

V

All Pins Minimum Voltage

—

-0.3

V

PG, PG Maximum Current

—

Internally Limited

A

ESD Voltage, All Pins (3)

Human Body Model

Machine Model

±2000

±200

V

THERMAL RATINGS

Storage Temperature

-65 to 150

°C

Operating Temperature

Ambient (4)

Junction

-40 to 85

-40 to 160

°C

Peak Package Reflow Temperature During Reflow (5), (6)

Note 6

°C

Thermal Resistance (7)

, (8)

Junction-to-Ambient, Single-Layer Board (9)

Junction-to-Ambient, Four-Layer Board (10)

167

115

°C/W

Notes

1.

Refer to the section titled Power MOSFET Energy Capability on page 21 for a detailed explanation on this parameter.

2.

3.

4.

The limiting factor is junction temperature, taking into account power dissipation, thermal resistance, and heatsinking.

5.

Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may

cause malfunction or permanent damage to the device.

6.

Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow

Temperature and Moisture Sensitivity Levels (MSL),

Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.

MC33xxxD enter 33xxx), and review parametrics.

7.

Refer to the section titled Thermal Shutdown on page 15 for more thermal resistance values under various conditions.

8.

The VOUT and VIN pins comprise the main heat conduction paths.

9.

Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.

10.

Per JEDEC JESD51-6 with the board (JESD51-7) horizontal. There are no thermal vias connecting the package to the two planes in the

board.