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74LVC1G86GF Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVC1G86GF Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 17 page ![]() 74AUP1G86_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02.00 — 16 May 2006 3 of 17 Philips Semiconductors 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level. Fig 4. Pin configuration SOT353-1 (TSSOP5) Fig 5. Pin configuration SOT886 (XSON6) Fig 6. Pin configuration SOT891 (XSON6) 74AUP1G86 BVCC A GND Y 001aaf041 1 2 3 5 4 74AUP1G86 A 001aaf042 B GND n.c. VCC Y Transparent top view 2 3 1 5 4 6 74AUP1G86 A 001aaf043 B GND n.c. VCC Y Transparent top view 2 3 1 5 4 6 Table 3: Pin description Symbol Pin Description TSSOP5 XSON6 B 1 1 data input B A 2 2 data input A GND 3 3 ground (0 V) Y 4 4 data output Y n.c. - 5 not connected VCC 5 6 supply voltage Table 4: Function table [1] Input Output A B Y LL L LH H HL H HH L |
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