CD74AC245 datasheet(6/14 Pages) TI

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Three-State Output Capacitance

Input Capacitance

-10-

-10

Power Dissipation Capacitance

CPD

(Note 11)

NOTES:

8. Limits tested 100%

9. 3.3V Min is at 3.6V, Max is at 3V.

10. 5V Min is at 5.5V, Max is at 4.5V.

11. CPD is used to determine the dynamic power consumption per channel.

AC: PD = VCC

2 f

i (CPD + CL)

ACT: PD = VCC

2 f

i (CPD + CL) + VCC ∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.

NOTES:

12. Input pulses have the following characteristics: PRR

≤ 1MHz, tr = 3ns, SKEW 1ns.

13. R.F. fixture with 700MHz design rules required. IC should be soldered into test board and bypassed with 0.1

µF capacitor. Scope and

probes require 700MHz bandwidth.

FIGURE 1. SIMULTANEOUS SWITCHING TRANSIENT WAVEFORMS

Switching Speciﬁcations Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)

PARAMETER

SYMBOL

VCC (V)

-40oC TO 85oC

-55oC TO 125oC

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

OTHER

OUTPUTS

OUTPUT

UNDER

TEST

VOH

VOL

VOHV

VOLP

VOL

VOH

CD54/74AC245, CD54/74ACT245

CD74AC245 Datasheet(PDF) 6 Page - Texas Instruments

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