CRX14 datasheet(13/40 Pages) STMICROELECTRONICS

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CRX14

Figure 7. I²C Bus Protocol

I²C Memory Addressing

To start up communication with the CRX14, the

bus master must initiate a START condition. Then,

the bus master sends 8 bits (with the most signifi-

cant bit first) on the Serial Data line, SDA. These

bits consist of the Device Select Code (7 bits) plus

a RW bit.

According to the I²C bus definition, the seven most

significant bits of the Device Select Code are the

Device Type Identifier. For the CRX14, these bits

are defined as shown in Table 6.

The 8th bit is the Read/Write bit (RW). It is set to

‘1’ for I²C Read, and to ‘0’ for I²C Write operations.

If the data sent by the bus master matches the De-

vice Select Code of a CRX14 device, the corre-

sponding device returns an acknowledgment on

the SDA bus during the 9th bit time.

The CRX14 devices whose Device Select Codes

do not correspond to the data sent, generate a No-

ACK. They deselect themselves from the bus and

go into stand-by mode.

CRX14 I²C Write Operations

The bus master sends a START condition, fol-

lowed by a Device Select Code and the R/W bit set

to ’0’. The CRX14 that corresponds to the Device

Select Code, acknowledges and waits for the bus

master to send the Byte address of the register

that is to be written to. After receipt of the address,

the CRX14 returns another ACK, and waits for the

bus master to send the data Bytes that are to be

written.

In the CRX14 I²C Write mode, the bus master may

sends one or more data Bytes depending on the

selected register.

The CRX14 replies with an ACK after each data

Byte received. The bus master terminates the

transfer by generating a STOP condition.

SCL

SDA

SCL

SDA

START

CONDITION

SDA

INPUT

SDA

CHANGE

AI00792

STOP

CONDITION

MSB

ACK

START

CONDITION

SCL

MSB

ACK

STOP

CONDITION

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