SN74LVC543A

OCTAL REGISTERED TRANSCEIVER

WITH 3STATE OUTPUTS

SCAS299H − JANUARY 1993 − REVISED AUGUST 2003

1

POST OFFICE BOX 655303

All Ports (5-V Input/Output Voltage With

Operation

JESD 17

description/ordering information

The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction.

Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each

register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and

LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A

latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the

data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA, LEBA,

and OEBA.

preventing damaging current backflow through the device when it is powered down.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE MARKING

SOIC − DW

Tube of 25

SN74LVC543ADW

LVC543A

SOIC − DW

Reel of 2000

SN74LVC543ADWR

LVC543A

−40

°C to 85°C

SSOP − DB

Reel of 2000

SN74LVC543ADBR

LC543A

−40

°C to 85°C

Tube of 60

SN74LVC543APW

TSSOP − PW

Reel of 2000

SN74LVC543APWR

LC543A

TSSOP − PW

Reel of 250

SN74LVC543APWT

LC543A

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Copyright

 2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DB, DW, OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

LEBA

OEBA

A1

A2

A3

A4

A5

A6

A7

A8

CEAB

GND

CEBA

B1

B2

B3

B4

B5

B6

B7

B8

LEAB

OEAB