WM8816

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Rev 1.5 October 2004

8

REGISTER MAP

ADDRESS BYTE BITS

DATA BYTE

REGISTER

7

6

5

4

3

2

1

0

MSB…LSB

Function

Peak Detector Status

R4

X

1

0

1

1

R/W

X

X

Output code

00000000

00000001

00000010

00000011

No overload

Right overload

Left overload

Both overload

Peak Detector

Reference

R3

X

1

1

0

0

R/W

X

X

Input code

11111111

11111110

11111101

:

00000010

00000001

00000000

DAC output

255/256

× 18V

254/256

× 18V

253/256

× 18V

:

2/256

× 18V

1/256

× 18V

AGND

Left Channel Gain

R2

X

1

1

0

1

R/W

X

X

Input code

11111111

11111110

11111101

:

11100000

00000010

00000001

00000000

Gain dB

+15.5

+15.0

+14.5

:

0.0

-111.0

-111.5

mute

Right Channel Gain

R1

X

1

1

1

0

R/W

X

X

Input code

11111111

11111110

11111101

:

11100000

00000010

00000001

00000000

Gain dB

+15.5

+15.0

+14.5

:

0.0

-111.0

-111.5

mute

Both Channel Gains

R5

X

1

0

0

1

W

X

X

Write to both gain registers

Table 1 Register Map Description

Notes:

1.

Address bit 2 is the read / write bit (1 for read, 0 for write).

2.

X represents ‘do not care’ entries. Set to 1 for minimum power consumption.

3.

All registers are set to their default value (all zeros) during power-on reset, except R3 which is set to 255.