ADCMP572 datasheet(12/16 Pages) AD

12 / 16 page

ADCMP572/ADCMP573

Rev. 0 | Page 12 of 16

TYPICAL APPLICATION CIRCUITS

3.3V

Ω

ADCMP572

VIN

VTP

VTN

LATCH

INPUTS

Figure 21. Zero-Crossing Detector with 3.3 V CML Outputs

Ω

VTP

VTN

LATCH

INPUTS

VCCI = 5.2V

ADCMP572

VCCO

Figure 22. LVDS to 50 Ω Back Terminated RSPECL Receiver

Ω

–

VIN

VTH

LATCH

INPUTS

GND = –1V

VCCI = 3.3V

VCCO = 2.5V/3.3V

2.5V/3.3V

ADCMP572

Figure 23. Comparator with ±1 V Input Range and

2.5 V or 3.3 V CML Outputs

Ω

VIN

VTH

LATCH

INPUTS

VCCI = 5.2V

VCCO = 3.3V/5.2V

3.3V/5.2V

ADCMP572

Figure 24. Comparator with 0 V to 3 V Input Range and

3.3 V or 5.2 V Positive CML Outputs

LATCH

INPUTS

VCCI

VCCO = 3.3V

Ω

100

Ω

100

Ω

ADCMP572

Figure 25. Interfacing 3.3 V CML to a 50 Ω

Ground Terminated Instrument

VCCO

VCCO = 3.3V

VCCO

750

Ω

VCCI

ADCMP572

Ω

Figure 26. Disabling the ADCMP572 Latch Feature

500

Ω

VCCI = 5.2V = VCCO

VTT = 3.2V

VCCO

ADCMP573

Ω

Figure 27. Disabling the ADCMP573 Latch Feature

HYS

VCCO

VCCI

ADCMP572

Ω

Ω TO 5kΩ

Figure 28. Adding Hysteresis Using the HYS Control Pin

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