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AT89LP4052-20PI Datasheet(PDF) 16 Page - ATMEL Corporation |
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AT89LP4052-20PI Datasheet(HTML) 16 Page - ATMEL Corporation |
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16 / 90 page ![]() 16 3547F–MICRO–6/06 AT89LP2052/LP4052 Table 13-2. IE – Interrupt Enable Register IE = A8H Reset Value = 00X0 0000B Bit Addressable EA EC – ES ET1 EX1 ET0 EX0 Bit 7 6 543 21 0 Symbol Function EA Global enable/disable. All interrupts are disabled when EA = 0. When EA = 1, each interrupt source is enabled/disabled by setting /clearing its own enable bit. EC Comparator Interrupt Enable ES Serial Port Interrupt Enable ET1 Timer 1 Interrupt Enable EX1 External Interrupt 1 Enable ET0 Timer 0 Interrupt Enable EX0 External Interrupt 0 Enable Table 13-3. IP – Interrupt Priority Register IP = B8H Reset Value = X0X0 0000B Bit Addressable – PC – PS PT1 PX1 PT0 PX0 Bit 7 6 543 21 0 Symbol Function PC Comparator Interrupt Priority Low PS Serial Port Interrupt Priority Low PT1 Timer 1 Interrupt Priority Low PX1 External Interrupt 1 Priority Low PT0 Timer 0 Interrupt Priority Low PX0 External Interrupt 0 Priority Low |
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