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T2803-PLQ Datasheet(PDF) 21 Page - ATMEL Corporation

Part # T2803-PLQ
Description  2.4 GHZ WDECT/ISM SINGLE CHIP TRANSCEIVER
PDF  28 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

T2803-PLQ Datasheet(HTML) 21 Page - ATMEL Corporation

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21
4572I–DECT–07/05
T2803
Figure 7-1.
3-wire Bus Protocol Timing Diagram
Figure 7-2.
TX DATA Timing
DATA
CLOCK
ENABLE
TT
TEC
TS
TC
TH
TL
TPER
Table 7-5.
3-wire bus Protocol Table
Description
Symbol
Minimum Value
Unit
Clock period
TPER
125
ns
Set time data to clock
TS
60
ns
Hold time data to clock
TH
60
ns
Clock pulse width
TC
125
ns
Set time enable to clock
TL
200
ns
Hold time enable to data
TEC
0
ns
Time between two protocols
TT
250
ns
Set-up time TX DATA
TS
> 8 ns
When using REFCLK = 10.368 MHz, TS and TH
must be considered for falling and rising edge of
REFCLK
Hold time TX DATA
TH
> 8 ns
RefCLK
TX_DATA
T
S
T
H



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