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HEF40373BD Datasheet(PDF) 2 Page - NXP Semiconductors |
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HEF40373BD Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 7 page ![]() January 1995 2 Philips Semiconductors Product specification Octal transparent latch with 3-state outputs HEF40373B MSI DESCRIPTION The HEF40373B is an 8-bit transparent latch with 3-state buffered outputs. The output stages have high current output capability suitable for driving highly capacitive loads. The latch outputs follow the data inputs when the latch enable (E) is HIGH. When E is LOW, the data that meets the set-up times is latched. The 3-state outputs are controlled by the output enable input EO. A HIGH on EO causes the outputs to assume a high impedance OFF-state. The device features hysteresis on the E input to improve noise rejection. Schmitt-trigger action in the E input makes the circuit highly tolerant to slower input rise and fall times. The HEF40373B is pin and functionally compatible with the TTL ‘373’ device. Supply voltage range: 3 to 15 V. Fig.1 Functional diagram. Fig.2 Pinning diagram. HEF40373BP(N): 20-lead DIL; plastic (SOT146-1) HEF40373BD(F): 20-lead DIL; ceramic (cerdip) (SOT152) HEF40373BT(D): 20-lead SO; plastic (SOT163-1) ( ): Package Designator North America PINNING FAMILY DATA, IDD LIMITS category MSI See Family Specifications D0 to D7 data inputs E latch enable input EO output enable input (active LOW) O0 to O7 3-state buffered outputs |
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