1

EDS-103295 Rev A

The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions.

Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza

Microdevices product for use in life-support devices and/or systems.

Copyright 2001 Sirenza Microdevices, Inc. All worldwide rights reserved.

http://www.sirenza.com

Phone: (800) SMI-MMIC

303 South Technology Court

Broomfield, CO 80021

Preliminary

Sirenza Microdevices’ SPF-2000 is a high linearity, low noise

0.25

µm pHEMT. This 300µm device is ideally biased at 3V,20mA

for lowest noise performance. At 5V,40mA the device delivers

excellent output TOI of 32 dBm. It provides ideal performance

as driver stages in many commercial, industrial and military

LNA applications.

Product Description

SPF-2000

Low Noise High Linearity

pHEMT GaAs FET

0.1 - 12 GHz Operation

Product Features

Applications

and Instrumentation

Typical Gain Performance

0

5

10

15

20

25

30

0

5

10

15

20

25

30

Frequency (GHz)

3V, 20mA

5V, 40mA

Gmax

Gain

Sy m b o l

D e vice C h ar ac ter istic s:

T e s t C o ndition s ,

V d s = 3V, Id s = 20 m A , T = 25 °C

(un le s s othe r w is e no te d)

Te s t

F r e q ue nc y

Un its

Min .

Ty p .

Ma x .

Gm a x

Z

4.0 G H z

12 .0 G H z

dB

dB

dB

-

21

13

25

23

15

-

25

17

S

21

Z

1.9 G H z

dB

1 6

18

2 0

NF

MIN

Min i m u m N o i s e F i g u r e

Z

4.0 G H z

12 .0 G H z

dB

dB

dB

-

-

-

0.5

0.6

1.2

-

-

-

P

1d B

O u tp u t 1 d B C o m p re s s i o n Po i n t

V

I

V

I

V

I

V

I

2.0 G H z

2.0 G H z

12 .0 G H z

12 .0 G H z

dB m

dB m

dB m

dB m

-

-

-

-

20 .0

15.0

21

18

-

-

-

-

G

1d B

G ain at 1dB C om pres s i on P o i n t

V

I

V

I

V

I

V

I

2.0 G H z

2.0 G H z

12 .0 G H z

12 .0 G H z

dB m

dB m

dB m

dB m

-

-

-

-

17.7

17.0

13.0

11 .0

-

-

-

-

OIP

3

O u tpu t T h ird O rde r In terc ep t P o i n t

V

I

V

I

V

I

V

I

2.0 G H z

2.0 G H z

12 .0 G H z

12 .0 G H z

dB m

dB m

dB m

dB m

-

-

-

-

32

28

32

30

-

-

-

-

I

DS S

mA

3 0

8 5

1 4 0

V

P

V

I

V

-1.5

-1.0

-0 .5

G

M

Tra ns c o nd uc ta nc e

V

m S

-

1 12

-

BV

GS

I

V

-

-1 7

-8

BV

GD

I

V

-

-1 7

-8

R

TH

T h e r m a l R e s ista n ce

C/W

1 1 0

V

DS

D ra in - so u rce

V

5 .5

I

DQ

D ra in - so u rce , q u i e sce n t

m A

5 5

P

DIS S

W0 .2

[1] 100% tested - DC parameters tested on wafer.

[2] Sample tested - Samples pullled from each wafer lot. Sample test specifications are based on statistical data from sample test measurements.

[3] V