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AP431SA Datasheet(PDF) 5 Page - Diodes Incorporated

Part # AP431SA
Description  ADJUSTABLE PRECISION SHUNT REGULATOR
PDF  14 Pages
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Manufacturer  DIODES [Diodes Incorporated]
Direct Link  http://www.diodes.com
Logo DIODES - Diodes Incorporated

AP431SA Datasheet(HTML) 5 Page - Diodes Incorporated

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AP431/AP431A
ADJUSTABLE PRECISION SHUNT REGULATOR
AP431/AP431A Rev. 5
5 of 14
MARCH 2007
www.diodes.com
© Diodes Incorporated
Electrical Characteristics ( TA = 25
oC, V+ = +5.0V, unless otherwise stated )
PARAMETER
TEST CONDITIONS
SYMBOL
MIN.
TYP. MAX. UNIT
Reference voltage
VKA = VREF,
I KA = 10mA (Fig.1)
AP431
AP431A
VREF
2.470
2.482
2.495
2.520
2.507
V
Deviation of Reference input voltage over
temperature (Note 8)
VKA = VREF, IKA = 10mA,
Ta = Full range (Fig.1)
VREF
⎯
8.0
20
mV
VKA = 10V ~VREF
∆VREF
⎯
-1.4
-2.0
mV/V
Ratio of the change in Reference voltage to
the change in Cathode voltage
IKA = 10mA (Fig. 2)
VKA= 36V ~10V
∆VKA
⎯
-1
-2
mV/V
Reference input current
R1 = 10KΩ,R2 = ∞ IKA= 10mA (Fig. 2)
IREF
⎯
1.4
3.5
µA
Deviation of Reference input current over
temperature
R1 = 10KΩ,R2 = ∞ IKA = 10mA
Ta = Full range (Fig. 2)
αIREF
⎯
0.4
1.2
µA
Minimum Cathode current for regulation
VKA = VREF (Fig.1)
IKA(MIN)
⎯
0.19
0.5
mA
Off-state current
VKA = 36V, VREF = 0V (Fig. 3)
IKA(OFF)
⎯
0.1
1.0
µA
Dynamic output impedance (Note 9)
V KA = VREF V KA = VREF
∆IKA = 0.1mA ~ 15mA
Frequency
≤ 1KHz (Fig.1)
|ZKA|
⎯
0.2
0.5
Ω
VMAX
VMIN
TI
T2
Temperature
VDEV = VMAX - VMIN
Note: 8. Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference over the full temperature
range. The average temperature coefficient of the reference input voltage
αVREF is defined as:
1
2
6
REF
DEV
REF
T
T
10
)
C)
(25
V
V
(
V
−
⋅
°
=
α
……………………..……………….. (
)
C
ppm
°
Where:
T2 – T1 = full temperature change.
αVREF can be positive or negative depending on whether the slope is positive or negative.
Note: 9. The dynamic output impedance, RZ, is defined as:
KA
KA
KA
I
V
Z
∆
∆
=
When the device is programmed with two external resistors R1 and R2 (see Figure 2.), the dynamic output impedance of the overall
circuit, is defined as:
)
R2
R1
(1
Z
i
v
Z
KA
'
KA
+
∆
∆
=
≈



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