SMSC LPC47N217

Page 3

Revision 0.2 (03-29-07)

PRODUCT PREVIEW

General Description

The SMSC LPC47N217 is a 3.3V PC 99, PC2001, and ACPI 2.0 compliant Super I/O Controller. The

LPC47N217 implements the LPC interface, a pin reduced ISA interface which provides the same or better

performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 14 GPIO

pins.

The LPC47N217 incorporates a 16C550A compatible UART and one Multi-Mode parallel port with

ChiProtect

™ circuitry plus EPP and ECP support. This device also offers a full 16-bit internally decoded

address bus, a Serial IRQ interface with PCI CLKRUN# support, relocatable configuration ports, and three

DMA channel options.

The on-chip UART is compatible with the 16C550A. There is a dedicated Serial Infrared interface UART,

which complies with IrDA v1.2 (Fast IR), HPSIR, and ASKIR formats (used by Sharp and other PDAs), as

well as Consumer IR.

The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and ECP. The

parallel port ChiProtect

™ circuitry prevents damage caused by an attached powered printer when the

LPC47N217 is not powered.

The LPC47N217 features Software Configurable Logic (SCL) for ease of use. SCL allows programmable

system configuration of key functions such as the parallel port and UART.

The LPC47N217 supports the ISA Plug-and-Play Standard register set (Version 1.0a) and provides the

recommended functionality to support Windows operating systems, PC99, and PC2001. The I/O Address,

DMA Channel, and Hardware IRQ of each device in the LPC47N217 may be reprogrammed through the

internal configuration registers. There are multiple I/O address location options, a Serialized IRQ interface,

and three DMA channels.