Application Notes

VS- supplies should be bypassed to ground with separate 0.1μF ceramic capacitors. A bulk

capacitor (i.e. 2.2μF or larger tantalum capacitor) within 100mm to provide large, slow

currents and better performance. This bulk capacitor can be shared with other analog parts.

Good PC board layout techniques optimize performance by decreasing the amount of

stray capacitance at the op-amp’s inputs and output. To decrease stray capacitance, minimize

trace lengths and widths by placing external components as close to the device as possible.

Use surface-mount components whenever possible. For the op-amp, soldering the part to the

board directly is strongly recommended. Try to keep the high frequency big current loop area

small to minimize the EMI (electromagnetic interfacing).

GROUNDING

A ground plane layer is important for the AD854xA circuit design. The length of the

current path speed currents in an inductive ground return will create an unwanted voltage

noise. Broad ground plane areas will reduce the parasitic inductance.

INPUT-TO-OUTPUT COUPLING

To minimize capacitive coupling, the input and output signal traces should not be parallel.

This helps reduce unwanted positive feedback.

1.1MHz, 85µA, CMOS, RRIO Operational Amplifiers

UMW

AD8541,AD8542,AD8544

R

www.umw-ic.com

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UTD Semiconductor Co.,Limited