Application Notes

Low Input Bias Current

The AD863xA family is a CMOS op-amp family and features very low input

bias current in pA range. The low input bias current allows the amplifiers to be used in

applications with high resistance sources. Care must be taken to minimize PCB

Surface Leakage. See below section on “PCB Surface Leakage” for more details.

PCB Surface Leakage

In applications where low input bias current is critical, Printed Circuit Board

(PCB) surface leakage effects need to be considered. Surface leakage is caused by

humidity, dust or other contamination on the board. Under low humidity conditions, a

typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5pA of

current to flow, which is greater than the AD863xA’s input bias current at +25℃

(±1fA, typical). It is recommended to use multi-layer PCB layout and route the op-

amp’s –IN and +IN signal under the PCB surface.

The effective way to reduce surface leakage is to use a guard ring around

sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive

pin. An example of this type of layout is shown in Figure 1 for Inverting Gain

application.

1. For Non-Inverting Gain and Unity-Gain Buffer:

a) Connect the non-inverting pin (+IN) to the input with a wire that does not

touch the PCB surface.

b) Connect the guard ring to the inverting input pin (–IN). This biases the

guard ring to the Common Mode input voltage.

2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to

voltage, such as photo detectors):

a) Connect the guard ring to the non-inverting input pin (+IN). This biases

the guard ring to the same reference voltage as the op-amp (e.g., VS/2 or ground).

b) Connect the inverting pin (–IN) to the input with a wire that does not

touch the PCB surface

Figure 1. Use a guard ring around sensitive pins

480

μA, 6.5MHz, RRIO CMOS Operational Amplifiers

UMW

AD8631,AD8632,AD8634

R

www.umw-ic.com

7

UTD Semiconductor Co.,Limited