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ADP7112 Datasheet(PDF) 26 Page - Analog Devices

Part # ADP7112
Description  20V, 200mA, Ultra-Low Noise, Ultra-High PSRR, Linear Regulator
PDF  47 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP7112 Datasheet(HTML) 26 Page - Analog Devices

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Data Sheet
LT3046
analog.com
Rev 0
26 of 47
meets these requirements. While the LT3046 is robust enough not to oscillate if the recommended layout is not
followed, depending on the actual layout, phase and gain margin, noise, and PSRR performance can degrade.
Figure 69. COUT and CSET Connections for Best Performance
Stability and Output Capacitance
The LT3046 requires an output capacitor for stability. Given its high bandwidth, Analog Devices recommends low
ESR and ESL ceramic capacitors. A minimum of 4.7μF capacitance with an ESR of less than 20mΩ and an ESL of less
than 2nH is required for stability.
Given the high PSRR and low-noise performance attained using a single 4.7μF ceramic-output capacitor, larger
values of output capacitors are not necessary. However, these capacitors can still improve the performance. See
the Typical Performance Characteristics section for additional information. Moreover, larger value output
capacitance decreases peak-output deviations during a load transient. Note that bypass capacitors used to
decouple individual components powered by the LT3046 increase the effective-output capacitance.
Give extra consideration to the type of ceramic capacitors used. The capacitors are manufactured with a variety of
dielectrics, each with different behaviors across temperature and applied voltage. The most common dielectrics
used are specified with Electronic Industries Alliance (EIA) temperature characteristic codes of Z5U, Y5V, X5R, and
X7R. The Z5U and Y5V dielectrics are good for providing high capacitance in small packages, but these dielectrics
tend to have stronger voltage and temperature coefficients as shown in Figure 70 and Figure 71. When used with a
5V regulator, a 16V, 10μF Y5V capacitor can exhibit an effective value as low as 1μF to 3μF for the DC bias voltage
applied over the operating temperature range.
CIN
100µA
IN
EN/UV
PGFB
VIN
SET
GND
ILIM
OUTS
OUT
LT3046
VOUT
IOUT(MAX)
200mA
CSET
RSET
COUT
DEMO BOARD
PCB LAYOUT
ILLUSTRATES
4-TERMINAL
CONNECTION
TO COUT
PG



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