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PCD3360P Datasheet(PDF) 12 Page - NXP Semiconductors |
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PCD3360P Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 20 page ![]() 1997 Jan 15 12 Philips Semiconductors Product specification Programmable multi-tone telephone ringer PCD3360 11 AC CHARACTERISTICS VDD = 6.0 V; VSS =0V; fOSC = 64 kHz; Tamb = −25 to +70 °C; valid enable conditions at FDI and FDE; all voltages with respect to VSS; unless otherwise specified. Notes 1. The switch-on delay is measured in cycles of incoming ringing frequency. 2. Lead lengths of ROSC and COSC to be kept to a minimum. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT td(on) switch-on delay FDE = LOW; ringing frequency within limit set by FL and FH; note 1 1 − 1.5 cycle td(off) switch-off delay FL = LOW −− 50 ms FL = HIGH −− 75 ms fOSC oscillator frequency ROSC = 365 kW; COSC =56pF; Tamb =25 °C; note 2 60 64 68 kHz ∆fOSC/∆VP oscillator frequency variation with respect to supply voltage − 1 − %/V ∆f OSC/∆T oscillator frequency variation with respect to temperature − 0.05 − %/K 12 APPLICATION INFORMATION Application of the PCD3360 in a telephone ringer circuit together with a loudspeaker is shown in Fig.8. The threshold levels VH and VL of the frequency discriminator circuit are determined by: • The logic threshold of input FDI (0.5VDD, typically 3.4 V for VDD = 6.8 V) • The pull-down current of input FDI (20 µA typically for FDI < 3.4 V) • The value of R2 (680 kΩ in Fig.8). For a positive slope the voltage at R2 must exceed the value VH before FDI will become HIGH; VH is the sum of the input threshold and the voltage drop across R2 thus: For a negative slope, the voltage at R2 must decrease below the value of VL before FDI will become LOW. Because the current into FDI is negligible with FDI = HIGH the voltage drop across R2 can be discounted, thus VL = 3.4 V. The minimum operating voltage across C3 is 17.8 V which is determined by: • The minimum operating voltage of the PCD3360 (5.8 V) • The supply current of the PCD3360 (120 µA max.) • The value of R3 (100 kΩ in Fig.8). V H 3.4 680 10 3 – × 20 10 6 – × × + 17 V == The total switch-on delay equals approximately the time required to charge the supply capacitor C3 to the minimum operating value, plus the specified switch-on delay of the PCD3360. The high operating voltage combined with the class D output stage ensures the optimal energy conversion and thereby a high sound level. The design can easily be optimized for parallel or series connection of more than one ringer. The diode bridge, zener diode (D1) and resistor R1 protect the ringer against transients up to 5 kV. During these surges the voltage on the 68 V zener diode (BZW03-C68) can rise to 100 V; the DMOS transistor BST72A (TR1) has a maximum drain-source voltage of 100 V. Up to 220 V, 50 Hz can be applied to the a/b terminals without damaging the ringer. The choke (L1) in series with the 50 Ω loudspeaker increases the sound pressure level by approximately 3 dB by suppression of the 32 kHz carrier frequency and its sidebands. The flyback diode BAX18A (D2) is a fast type with low forward voltage to obtain high efficiency. Application of the PCD3360 together with a PXE transducer is shown in Fig.9. The only significant difference between Fig.8 and Fig.9 is the output stage. Two BST72A transistors provide an output voltage swing almost equal to the voltage at C3. Pins IS1 and IS2 are inoperative because DM = HIGH. Volume control is possible using resistor RV. |
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