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PCD5043H Datasheet(PDF) 5 Page - NXP Semiconductors |
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PCD5043H Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 24 page  1996 Oct 31 5 Philips Semiconductors Objective specification DECT burst mode controller PCD5043 VSS3 26 P negative supply 3 DO 27 O 3-state data output on the speech interface FS1 28 I/O 8 kHz framing signal to ADPCM CODEC 1 output, for simple base + handset, otherwise 8 kHz framing input FS2 29 O 8 kHz framing signal to ADPCM CODEC 2 in the base station mode DI 30 I data input on the speech interface DCK 31 O simple base + handset; 1152 kHz data clock (output), otherwise 2048 kHz data clock (input) signal CLK3 32 O 3.456 MHz clock (nominal value, used to adjust system timing) ANT_SW 33 O selects one of two antennas T_ENABLE 34 O Transmitter Enable (active LOW) T_POWER_RMP 35 O Transmitter Power Ramp control RMT_STAT 36 I serial 8-bit data can be read in for each slot; REMote radio SYNTH_LOCK 37 I lock indication from synthesizer VSS4 38 P negative supply 4 REF_CLK 39 O reference frequency for the synthesizer, i.e. the crystal oscillator clock fCLK VDD2 40 P positive supply 2 S_ENABLE 41 O synthesizer enable S_CLK 42 O clock signal, to be used with S_DATA S_DATA 43 O serial data to the synthesizer S_POWER_DWN 44 O synthesizer power-down control VCO_BND_SW 45 O VCO bandswitch control signal 1200 HZ 46 O control signal for dual synthesizer schemes T_DATA 47 O serial output data to transmitter SET_OFF_IN 48 I switches off the crystal oscillator, and prevents all RF signals from becoming active TEST1 49 I selects various test modes.; normal operation set to 0 RSSI_AN 50 I analog signal (for basic DECT systems), peak signal strength measured after a lowpass filter TEST2 51 I selects various test modes; normal operation set to 0 TEST3 52 I selects various test modes; normal operation set to 0 R_DATA 53 I receive data R_ENABLE 54 O receiver enable (active LOW) R_POWER_DWN 55 O receiver power-down SLICE_CTR 56 O slice time constant control VDD3 57 P positive supply 3 VSS5 58 P negative supply 5 VREF 59 I reference input for the A/D converter VDD(RAM) 60 P power supply for data RAM SYNCPORT 61 I/O in the base station the signal is the SYNCPORT SYMBOL PIN TYPE(1) DESCRIPTION |
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