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ST92F124 Datasheet(PDF) 382 Page - STMicroelectronics |
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ST92F124 Datasheet(HTML) 382 Page - STMicroelectronics |
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382 / 429 page ![]() 382/429 ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS EMC CHARACTERISTICS Susceptibility tests are performed on a sample ba- sis during product characterization. Functional EMS (Electro Magnetic Susceptibil- ity) Based on a simple application running on the product, the product is stressed by two electro magnetic events until a failure occurs. ■ ESD: Electro-Static Discharge (positive and negative) is applied on all pins of the device until a functional disturbance occurs. This test conforms with the IEC 1000-4-2 standard. ■ FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and VSS through a 100pF capacitor, until a functional disturbance occurs. This test conforms with the IEC 1000-4- 4 standard. A device reset allows normal operations to be re- sumed. Designing hardened software to avoid noise problems EMC characterization and optimization are per- formed at component level with a typical applica- tion environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations: The software flowchart must include the manage- ment of runaway conditions such as: – Corrupted program counter – Unexpected reset – Critical Data corruption (control registers...) Prequalification trials: Most of the common failures (unexpected reset and program counter corruption) can be repro- duced by manually forcing a low state on the RE- SET pin or the Oscillator pins for 1 second. To complete these trials, ESD stress can be ap- plied directly on the device, over the range of specification values. When unexpected behaviour is detected, the software can be improved to pre- vent unrecoverable errors occurring (see applica- tion note AN1015). Electro Magnetic Interference (EMI) Based on a simple application running on the product, the product is monitored in terms of emis- sion. This emission test is in line with the norm SAE J 1752/3 which specifies the board and the loading of each pin. Notes: 1. Data based on characterization results, not tested in production. Symbol Parameter Conditions Level Unit VFESD Voltage limits to be applied on any I/O pin to induce a functional disturbance VDD=5V, TA=+25°C, fOSC=4MHz conforms to IEC 1000-4-2 >1.5 kV VFFTB Fast transient voltage burst limits to be applied through 100pF on VDD and VDD pins to induce a func- tional disturbance VDD=5V, TA=+25°C, fOSC=8MHz conforms to IEC 1000-4-4 >1.5 kV Symbol Parameter Conditions Monitored Frequency Band Max vs. [fOSC/fCPU] Unit 4/10MHz SEMI Peak level VDD=5V, TA=+25°C, PQFP100 14x20 package conforming to SAE J 1752/3 0.1MHz to 30MHz 13 dB µV 30MHz to 130MHz 25 130MHz to 1GHz 24 SAE EMI Level 3.5 - 1 |
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