ST92F124 datasheet(390/429 Pages) STMICROELECTRONICS

390 / 429 page

390/429

ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS

WATCHDOG TIMING TABLE

(VDD = 5V ± 10%, TA = –40°C to +125°C, CLoad = 50pF, fINTCLK = 24MHz, Push-pull output configuration,

unless otherwise specified)

Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,

watchdog prescaler and counter programmed values.

The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz, with minimum and

maximum prescaler value and minimum and maximum counter value.

Measurement points are VOH or VIH for positive pulses and VOL or VIL for negative pulses.

Legend:

Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;

2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;

Crystal Oscillator Clock period x PLL factor when the PLL is enabled.

Psc = Watchdog Prescaler Register content (WDTPR): from 0 to 255

Cnt = Watchdog Couter Registers content (WDTRH,WDTRL): from 0 to 65535

TWDIN = Watchdog Input signal period (WDIN), TWDIN ≥ 8 x Tck

WATCHDOG TIMING

N°

Symbol

Parameter

Value

Unit

Formula

Min

Max

TwWDOL

WDOUT Low Pulse Width

4 x (Psc+1) x (Cnt+1) x Tck

167

2.8

(Psc+1) x (Cnt+1) x TWDIN

333

TwWDOH

WDOUT High Pulse Width

4 x (Psc+1) x (Cnt+1) x Tck

167

2.8

(Psc+1) x (Cnt+1) x TWDIN

333

TwWDIL

WDIN High Pulse Width

≥ 4 x Tck

167

TwWDIH

WDIN Low Pulse Width

≥ 4 x Tck

167

ST92F124 Datasheet(PDF) 390 Page - STMicroelectronics

ST92F124 Datasheet(HTML) 390 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL